Renesas Electronics /R7FA6T1AD /SCI0 /LSR

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Interpret as LSR

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)ORER 0 (Reserved)Reserved 0FNUM0 (Reserved)Reserved 0PNUM0 (Reserved)Reserved

ORER=0

Description

Line Status Register

Fields

ORER

Overrun Error Flag (Valid only in asynchronous mode(including multi-processor) or clock synchronous mode, and FIFO selected)

0 (0): No overrun error occurred

1 (1): An overrun error has occurred

Reserved

This bit is read as 0.

FNUM

Framing Error Count Indicates the quantity of data with a framing error among the receive data stored in the receive FIFO data register (FRDRH and FRDRL).

Reserved

This bit is read as 0.

PNUM

Parity Error Count Indicates the quantity of data with a parity error among the receive data stored in the receive FIFO data register (FRDRH and FRDRL).

Reserved

These bits are read as 000.

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